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Introduction to Electronics

Scholar Year: 2019/2020 - 2S

Code: LACI12007    Acronym: IE
Scientific Fields: Electrónica e Telecomunicações
Section/Department: DEE - Department of Electrical Engineering

Courses

Acronym N. of students Study plan Curricular year ECTS Contact time Total Time
EACI 94 6,0 60 160,0

Teaching weeks: 15

Head

TeacherResponsability
José Inácio Pinto Rosado RochaHead

Weekly workload

Hours/week T TP P PL L TC THE EL OT OT/PL TPL S
Type of classes 2 2 2

Lectures

Type Teacher Classes Hours
Theorethical and Practical classes Totals 2 4,00
José Rocha   4,00
Laboratories Totals 4 8,00
Prática Laboratorial Totals 1 2,00
António Abreu   4,00
Filipe Cardoso   4,00
Raul Correia   2,00

Teaching language

Portuguese

Intended learning outcomes (Knowledges, skills and competencies to be developed by the students)

In this curricular unit the basic semiconductor components are studied: Diodes, Bipolar Junction Transistors (BJT) and Field Effect Transistors (MOSFET).

It intends to develop capacities of analysis, design and execution of some electronic circuits of low complexity

Syllabus

Junction Diodes
Semiconductor concept. Intrinsic and extrinsic semiconductor. PN junction. PN junction not polarized. PN junction directly polarized. Reverse polarization of the PN junction. Conventional sense of voltage and current in the diode. V-I characteristic of the diode. Diode symbols. Linear model by sections, Linear model by simplified sections, Ideal diode model. Diode applications. Dynamic resistance of the diode. Special diodes.

Bipolar Junction Transistor (BJT)
Bipolar junction transistor (BJT). BJT NPN. BJT PNP. The symbology of NPN and PNP transistors. Modes of operation of the transistors: ZAD (Direct Active Zone), ZS (Saturation Zone), ZC (Cut Zone), ZAI (Reverse Active Zone). BJT models for the various modes of operation. Early effect. BJT characteristic curves, Basic BJT assembly configurations and bias. Determination of operating mode. Operating point at rest (Q). BJT as a switch. BJT as an amplifier (C.E). Temperature effect compensation (C.E.). BJT model for small signals in the medium frequencies. The function of coupling and contour capacitors (C.E). Design of polarization circuits.

Transistor Metal Oxide Semiconductor (MOSFET)
Transistor Metal Oxide Semiconductor (MOSFET) channel N. Transistor Metal Oxide Semiconductor (MOSFET) channel P. Characteristic curves of MOSFET. Enrichment and depletion MOSFET. Most used symbologies for FET. Modes of operation of the field effect transistors. MOSFET models for the various modes of operation. Determination of operating mode. Working Point (Q). Polarization circuits. FET as a switch. Design of polarizing circuits. The MOSFET as an amplifier. MOSFET model for small signals in the medium frequencies. A brief reference to the Junction Field Effect Transistor (JFET).

Software

PSpice Student

Orcad Capture 9.1


Demonstration of the syllabus coherence with the UC intended learning outcomes

Theoretical / Practical Classes: Interactive demonstration and demonstration method with resolution of exercises;

Laboratory classes: Experimental method applied to the development of circuits and systems based on the knowledge acquired in the theoretical / practical classes.

Teaching methodologies

Distributed evaluation without final exam.

Assessment methodologies and evidences

Theoretical Exam, or average of the classifications in two Tests (70%)
Average Laboratory Classifications (30%)
The classification in the average of the tests less than 10 values implies the non approval in the CU. The minimum grade in each of the tests is 8 values.
The classification in the final exam less then 10 values implies the reprobation in the CU.
The classification of less than 10 values in the laboratory component implies failure in the CU.
It is not possible to take more than one test on each evaluation date, so that a student who fails a single test can only recover that test on the date of the normal exam. If you fail in both tests, your theoretical evaluation will be sent to the exam;

Attendance system

To obtain attendance, the student must first prepare each one of five laboratory studies and deliver at the end of each laboratory tables and/or graphs related to the experimental assemblies.

Assement and Attendance registers

Description Type Time (hours) End Date
Attendance (estimated)  Classes  30
Preparation/Accessement  Test/Exam  15
Study/Autonomous work  Study  95
Exercices resolution  Study  16
Micro tests/Exams  Test/Exam  6
  Total: 162

Primary Bibliography

Boylestad / Nashelsky;Electronic Devices and Circuit Theory, Prentice-Hall, 7th Edition,, 1972

Secondary Bibliography

Medeiros da Silva;Introdução aos circuitos eléctricos e electrónicos, Fundação Calouste Gulbenkian, 1996
Medeiros da Silva;Circuitos com Transistores Bipolares e MOS, Fundação Calouste Gulbenkian, 1999
Sedra / Smith;Microelectronics Circuits, Oxford University Press, 1998 (4th Edition)

Observations

Additional information on the assessment components, please consult the course sheet available on the moodle platform.

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